Benchmarking Methodology for Embedded Scalable Platforms

Embedded scalable platforms (ESP) are a novel generation of platform architectures that yield optimal energy-performance operations while supporting a diversity of embedded application workloads. A companion methodology combines full-system simulation, pre-designed HW/SW interface libraries, high-level synthesis and FPGA prototyping to enable an effective design-space exploration which is driven by the benchmarking of alternative ESP architectures through the execution of the actual software of the target workloads. As a result, ESP designers are guided in the choice and assembly of a heterogeneous set of programmable processors and hardware accelerators to balance regularity, flexibility, and specialization.